Typically, a frequency synthesizer comprises a first divide-by counter providing a reference signal to a phase detector in response to an oscillator signal from a crystal controlled reference oscillator. The phase detector provide a filtered d.c. voltage to a voltage controlled oscillator. A second divide-by counter provides a feedback signal from the output of the voltage controlled oscillator to the phase detector. This circuit arrangement is commonly referred to as a phase locked loop. Frequency synthesizers provide virtually an unlimited number of discrete frequencies directly related to the frequency of the reference oscillator for mixing with the carrier frequency within a selective call radio receiver. However, a disadvantage of known frequency synthesizers is that there is no known method of testing signals within the synthesizer in real time for diagnosing a faulty output signal.
Thus, what is needed is a frequency synthesizer having a built in test circuit for sampling in real time a number of signals within the frequency synthesizer for diagnosing the output of the frequency synthesizer.